Mixed Signal Verification Engineer

Job Title: Mixed Signal Verification Engineer

Location: On-site in Austin, TX (five days a week

Required Citizenship / Work Permit / Visa Status: Will sponsor H1-B

About The Position

For an exciting, well-funded start-up developing leading-edge technology of the next-generation high-speed communication, we are looking for a Mixed Signal Verification Engineer.

Requirements

Minimum Qualifications

• 5+ years of total experience
• Experience in Behavioural Modelling (BM) of Analog design for digital verification
• Knowledge in Mixed Signals dynamic Verification using chip digital design tools [no AMS]
• Experience in Verilog/SystemVerilog coding
• Experience in Virtuoso Schematics tools
• Basic knowledge in Analog design

Preferred Qualifications

• Experience in UVM
• Experience in both Synopsys and Cadence tools is an advantage

Additional Skills

• Verification Methodologies and Tools: Familiarity with verification methodologies and tools, including simulators, waveform viewers, execution automation, and coverage collection. Proven experience in developing scalable and portable test cases.
• Collaborative Environment: Ability to verify Analog/mixed-signal designs in a collaborative team environment.
• Communication: Strong communication skills, including the ability to write test plans, present results, and communicate clearly with multi-functional teams.

Nice to Haves

• Knowledge in Mixed Signals dynamic Verification using chip digital design tools [no AMS]
• Basic knowledge in Analog design
• Experience in both Synopsys and Cadence tools is an advantage
• Communication: Strong communication skills, including the ability to write test plans, present results, and communicate clearly with multi-functional teams

Skills: mixed signal,digital,cadence